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Title of Article

AN ALGORITHM OF DIE PLACEMENT ON A SILICON WAFER


Issue
1
Date
2010

Article type
scientific article
UDC
514.174 (621.37)
Pages
190-195
Keywords
integrated circuit (IC), dies, optimal placement


Authors
Mosin S.G.
Vladimirskiy gosuniversitet


Abstract
An iterative algorithm of IC die optimal placement on a silicon wafer has been proposed. Selection criteria for the optimal solution have been defined. Algorithm performance results for some experiments have been presented. A comparison with one of the existing solution methods has been made. An estimation of the proposed algorithm has been given.

File (in Russian)