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Title of Article

IMPLEMENTATION OF INTEGER RECURSIVE MULTIPLIERLESS FILTERS ON FPGA


Issue
1
Date
2014

Article type
scientific article
UDC
621.396
Pages
138-140
Keywords
digital recursive filter, programmable logic integrated circuit


Authors
Artemev V.V.
Nizhegorodskiy gosuniversitet im. N.I. Lobachevskogo


Abstract
A hardware implementation of an integer recursive multiplierless digital filter with a linear phase on Xilinx Spartan-3AN FPGA is considered. An example of comparison of hardware implementation costs for filters with and without the use of multipliers is presented.

File (in Russian)