IMPLEMENTATION OF INTEGER RECURSIVE MULTIPLIERLESS FILTERS ON FPGA |
1 | |
2014 |
scientific article | 621.396 | ||
138-140 | digital recursive filter, programmable logic integrated circuit |
A hardware implementation of an integer recursive multiplierless digital filter with a linear phase on Xilinx Spartan-3AN FPGA is considered. An example of comparison of hardware implementation costs for filters with and without the use of multipliers is presented. |